1. Field of the Invention
The present invention relates to a semiconductor device having a gate and source-and-drain, and a method of fabricating the semiconductor device.
2. Description of the Related Art
There is a still further need for micronization of recent semiconductor devices, where efforts have been made typically on a MOS transistor, having an extension structure, in order to make a deep-junction, source-and-drain more shallower.
More specifically, one known technique for forming an n-type MOS transistor is such as implanting arsenic (As) ion, under masking by the gate electrode and sidewall spacer, so as to form amorphous layers the surface of a semiconductor substrate, and then implanting phosphorus (P) ion to the amorphous portion through the same masks, to thereby form an n-type source-and drain (see Patent Document 1). Another known technique for forming a p-type MOS transistor is such as implanting silicon sidewall spacer, so as to form amorphous laysers the surface of a semiconductor substrate, and then implanting boron (B) ion to the amorphous portion through the same masks, to thereby form a p-type source-and drain (see Patent Document 2).
[Patent Document 1]
Japanese Patent Application Laid-Open No. Hei 11-186188
[Patent Document 2]
Japanese Patent Application Laid-Open No. Sho 61-018176
The above-described techniques should surely be successful in making the junction relatively shallower by preliminarily forming amorphous laysers the area where the source-and-drain region is to be formed later. Demands for suppressing lateral diffusion of the impurity contained in the source-and-drain are, however, becoming severer as the micronization of the semiconductor device further advances, and it is also necessary to fulfill requirements for higher performances as well as those for micronization. First, a deep-junction, source-and-drain region must be kept at a certain degree of depth in order to reduce the junction leakage. In addition, the source-and-drain must have a higher impurity concentration in order to reduce the contact resistance and sheet resistance. This inevitably enhances the lateral diffusion, and raises a problem in that the impurity can readily reach the extension region to thereby degrade the roll-off characteristics.
The present invention is conceived after considering the above-described problems, and an object thereof resides in providing a highly-reliable semiconductor device capable of exactly suppressing the lateral diffusion of the source-and-drain, fulfilling the requirements for further micronization and more advanced performances, and a method of fabricating such semiconductor device.